The present invention relates generally to self-running or self-operating PWM (Pulse Width Modulation) amplifiers, and more particularly to a novel self-operating PWM amplifier that can be suitably used to amplify audio signals.
Among examples of the so-called class-D amplifiers are self-running or self-operating PWM amplifiers. FIG. 11 shows a general setup of a conventional self-operating PWM amplifier. In the figure, the self-operating PWM amplifier includes an integrator circuit that is composed of an operational amplifier 301 and a capacitor 302 connected between an inverted (negative) input terminal and an output terminal of the operational amplifier 301, a comparator that is composed of resistors R1, R2 and an operational amplifier 303, a driver 304, and a CMOS inverter 305 functioning as a switching circuit.
In the CMOS inverter 305, as illustratively shown in FIG. 16, the drains of a PMOS transistor 600 and NMOS transistor 601 are interconnected, and the connection point between these drains is connected to an output terminal 603. The gates of the PMOS transistor 600 and NMOS transistor 601 are interconnected, and the connection point between these gates is connected to an input terminal 602. Further, the source of the PMOS transistor 600 is connected to a supply voltage +Vcc, while the source of the NMOS transistor 601 is connected to another supply voltage xe2x88x92Vcc.
The output terminal of the CMOS inverter 305 is coupled, via a low-pass filter composed of an inductance L1 and capacitor C1, to one input terminal of a speaker 306 that is a load of the PWM amplifier, and the other input terminal of the speaker 306 is grounded. In addition, the output terminal of the CMOS inverter 305 is coupled via the resistor R2 to a noninverted (positive) input terminal of the operational amplifier 303 and also coupled via a feedback resistor RNF to a noninverted input terminal of the operational amplifier 301 constituting the integrator circuit.
Output terminal of the operational amplifier 301 of the integrator circuit is coupled via the resistor R1 to the noninverted input terminal of the operational amplifier 303 of the comparator. Further, a signal source 300 is connected via an input resistor RIN to the inverted input terminal of the operational amplifier 301. Noninverted input terminal of the operational amplifier 301 and inverted input terminal of the operational amplifier 303 are each grounded.
The self-operating PWM amplifier of FIG. 11 arranged in the above-described manner, as a whole, functions as an inverting amplifier having a gain corresponding to a resistance ratio of RNF/RIN. Namely, in this self-operating PWM amplifier, a difference between an analog signal (audio signal) VIN input from the signal source 300 via the input resistor RIN and an output signal (switching signal) negatively fed back from the CMOS inverter 305 via the feedback resistor RNF is integrated via the integrator circuit composed of the operational amplifier 301 and capacitor 302, and the resultant integrated output from the integrator circuit is converted into a binary PWM (Pulse Width Modulated) signal by means of the hysteresis comparator composed of the resistors R1, R2 and operational amplifier 303.
Further, in the self-operating PWM amplifier, the PWM signal is amplified by the driver circuit 304, and, on the basis of the PWM signal, the driver circuit 304 drives the CMOS inverter 305 for switching operations. Output from the CMOS inverter 305 is not only supplied to the speaker 306 via the low-pass filter composed of the inductance L1 and capacitor C1 but also negatively fed, via the feedback resistor RNF, back to the inverted input terminal of the operational amplifier 301 constituting the integrator circuit. In this manner, the PWM amplifier can operate by itself.
When no analog signal VIN is input from the signal source 300 to the operational amplifier 301 of the integrator circuit, an output voltage V3 from the CMOS inverter 305, functioning as a switching circuit, switches between the level of the supply voltage +Vcc (i.e., xe2x80x9chigh levelxe2x80x9d) and the level of the supply voltage xe2x88x92Vcc (i.e., xe2x80x9clow levelxe2x80x9d) with a 50% duty cycle, as denoted by a dot-and-dash line in FIG. 12.
Because the noninverted input terminal of the integrator-circuit-constituting operational amplifier 301 is fixed to 0 V, when the output voltage V3 from the CMOS inverter 305 is at the high level, an output voltage V1 from the operational amplifier 301 of the integrator circuit, integrating the output voltage V3 from the CMOS inverter 305, increases in a negative direction (falls) with the passage of time. When the output voltage V3 from the CMOS inverter 305 has switched to the low level, the output voltage V1 from the operational amplifier 301 increases in a positive direction (rises). Consequently, the output voltage V3 from the CMOS inverter 305 presents a triangular voltage waveform as denoted by a broken line in FIG. 12.
As the output voltage V1 from the integrator circuit increases in the negative direction (falls), an input voltage V2 to the noninverted input terminal of the operational amplifier 303, constituting the hysteresis comparator, also increases in the negative direction. Because the output voltage V3 from the CMOS inverter 305, switching to the low level as the input voltage V2 to the operational amplifier 303 drops to 0 V, is positively fed back to the noninverted input terminal of the operational amplifier 303 via the resistor R2. Thus, the input voltage V2 to the noninverted input terminal of the operational amplifier 303 is rapidly drawn in the negative direction to a level that is determined by the current output voltage V1 from the integrator circuit, output voltage V3 from the CMOS inverter 305 and resistance ratio between the resistors R1 and R2.
Then, as the output voltage V1 from the integrator circuit increases in the positive direction, the input voltage V2 to the operational amplifier 303 increases. Because the output voltage V3 from the CMOS inverter 305, switching to the high level as the input voltage V2 to the operational amplifier 303 rises to 0 V, is positively fed back to the noninverted input terminal of the operational amplifier 303 via the resistor R2. Thus, the input voltage V2 to the noninverted input terminal of the operational amplifier 303 rapidly rises to a level that is determined by the current output voltage V1 from the integrator circuit, output voltage V3 from the CMOS inverter 305 and resistance ratio between the resistors R1 and R2. In this way, the input voltage V2 to the noninverted input terminal of the operational amplifier 303 varies as denoted by a solid line in FIG. 12.
When, on the other hand, an analog signal VIN is input from the signal source 300 to the operational amplifier 301 constituting the integrator circuit, the capacitor 302 repeats electrical recharging and discharging operations at a rate or with an inclination corresponding to the level of the input signal thereto, so that the output voltage V1 from the operational amplifier 301 presents a waveform as denoted by a broken line in FIG. 13. During that time, the CMOS inverter 305 outputs a binary signal, similar to a PWM signal, having pulse widths corresponding to the level of the input analog signal VIN (denoted by a solid line in FIG. 13) and varying between the high and low levels.
The PWM amplifier generally modulates an input signal with a high-frequency carrier signal, and thus in a case where such amplifiers of two stereophonic channels or more are mounted together on a single semiconductor chip, the amplifiers tend to cause greater mutual interferences therebetween than where liner amplifiers are mounted on the chip. Such great interferences between the amplifiers would often invite crosstalk and beats between the carrier frequencies, thus resulting in various inconveniences, such as a poor S/N ratio.
Although the PWM amplifier can have, at the input side of the integrator circuit, a feedback loop for negatively feeding back the amplifier output to reduce a distortion factor, it can not provide feedback over wide frequency bands, as permitted by the liner amplifier, due to the presence of the carrier frequency, so that the PWM amplifier tends to cause a great distortion factor.
In view of the foregoing, it is an object of the present invention to provide a novel self-operating PWM amplifier which, in a case where a plurality of such PWM amplifiers are mounted together, can minimize interferences between the amplifiers and achieves an improved distortion factor characteristic.
In order to accomplish the above-mentioned object, the present invention provides a novel self-operating PWM amplifier, which includes a differential integrator circuit having a first input terminal to which are input a first analog signal supplied from a first signal source and a negative feedback signal of amplified output of the PWM amplifier, and a second input terminal to which are input a second analog signal supplied from a second signal source and a negative feedback signal of the amplified output of the PWM amplifier. The second analog signal has a same amplitude as, but is opposite in phase from, the first analog signal, and the differential integrator circuit outputs two integrated signals of different polarities, by integrating a difference between the first analog signal and the negative feedback signal input to the first input terminal and a difference between the second analog signal and the negative feedback signal input to the second input terminal. The self-operating PWM amplifier also includes a comparator having two differential input terminals to which positive feedback is provided to present hysteresis characteristics. The comparator compares the two integrated signals output by the differential integrator circuit and thereby outputs a PWM signal. The self-operating PWM amplifier further includes: a first switching circuit having a pair of switching elements connected between first and second power supplies, a connection point between the switching elements being connected to one input terminal of a load; a second switching circuit having a pair of switching elements connected between the first and second power supplies, a connection point between the switching elements being connected to another input terminal of the load; a first driver circuit that delivers the PWM signal from the comparator to the first switching circuit; and a second driver circuit that delivers the PWM signal from the comparator to the second switching circuit.
In the self-operating PWM amplifier of the invention, the entire circuitry is constructed as balanced circuitry to receive balanced input signals and produce balanced output signals. This balanced circuitry arrangement can reduce influences of external noise and can minimize interferences in a case where a plurality of such amplifiers are mounted together. Further, the balanced operations of the self-operating PWM amplifier, permitted by the balanced circuitry, can effectively cancel out distortion of even-number order harmonics, and thus achieves an improved distortion factor characteristic. Furthermore, with the arrangement that positive feedback is provided to the two differential input terminals of the comparator, the input voltage to the comparator at predetermined comparison timing can be 0 V so that the comparator can operate at low voltage.
The self-operating PWM amplifier of the invention may further includes: a first feedback circuit connected between the first input terminal of the differential integrator circuit and an output terminal of the first switching circuit; and a second feedback circuit connected between the second input terminal of the differential integrator circuit and an output terminal of the second switching circuit. Here, the negative feedback signal of the amplified output is delivered via the first feedback circuit to the first input terminal of the differential integrator circuit, and also the negative feedback signal of the amplified output is delivered via the second feedback circuit to the second input terminal of the differential integrator circuit.
In one embodiment, the output terminal of the first switching circuit is connected to the one input terminal of the load via a first low-pass filter for eliminating a carrier-frequency component, and the output terminal of the second switching circuit is connected to the other input terminal of the load via a second low-pass filter for eliminating a carrier frequency component.
Preferably, the differential integrator circuit includes: an in-phase feedback type operational amplifier having a pair of differential input terminals, consisting of inverted and noninverted input terminals, to which are input the first analog signal and feedback signal and the second analog signal and feedback signal, respectively, and a pair of differential output terminals, consisting of two inverted output terminals, which output two integrated signals of different polarities; and integrating capacitors connected between the inverted input terminal and one of the inverted output terminals of the operational amplifier and between the noninverted input terminal and the other of the inverted output terminals of the operational amplifier, respectively. Because the in-phase feedback type operational amplifier having a pair of differential input terminals and a pair of differential output terminals is employed as an operational amplifier of the differential integrator circuit, the differential integrator circuit can operate in a completely balanced manner, which can even further reduce the influences of external noise. Namely, if constructed otherwise, the integrator circuit would be very susceptible to the influences of external noise due to the facts that the integrating capacitors have high impedance, the integrator circuit is a beginning-stage circuit of the self-operating PWM amplifier and the integrating capacitors repeat recharging/discharging operations at a high frequency. However, because, as described above, the integrator circuit of the invention is implemented by the in-phase feedback type operational amplifier that has differential input terminals and differential output terminals and can operates in a completely balanced manner, the present invention can effectively reduce the influences of external noise and operate at low voltage.
In one embodiment, the comparator having hysteresis characteristics comprises an in-phase feedback type operational amplifier having a pair of differential input terminals to which are input the two integrated signals of different polarities output by the differential integrator circuit and a pair of differential output terminals for outputting PWM signals of positive and negative phases by comparing the two integrated signals. Because the integrator circuit of the invention is implemented by the in-phase feedback type operational amplifier having differential input terminals and differential output terminals, it can operate in a completely balanced manner, and the invention can even further reduce the influences of external noise.
Preferably, each of the first and second feedback circuits includes a first feedback loop for passing a high-frequency component of an amplified output signal to be supplied to the load, and a second feedback loop for passing a low-frequency component of the amplified output signal to be supplied to the load. With this arrangement, the present invention achieve an improved S/N ratio and distortion factor characteristic over wide (low-to high) frequency bands of input signals.
The following will describe embodiments of the present invention, but it should be appreciated that the present invention is not limited to the described embodiments and various modifications of the invention are possible without departing from the basic principles of the invention. The scope of the present invention is therefore to be determined solely by the appended claims.